Direct memory access (DMA)

Direct memory access is a bus operation that permits reads and writes which are not controlled by the CPU. After gaining control, The DMA controller performs read and write operations directly between device and memory. DMA contoller initially ask for ownership of the bus to CPU through a bus request. On granting permissuion, DMA controller receives bus grant signals. CPU turns DMA controller to a bus master. Bus master is a device that can initiate its own bus transfer. Now DMA controller can perform reads and writes using a bus protocol. DMA controller includes three registers namely starting address register, length register and status register.