Direct memory access(DMA)

Direct memory access(DMA)

This is a bus operation. This allows reads and writes which are not controlled by the CPU. Here we require a DMA controller which requests control of the bus from the CPU. DMA controller performs operations directly between devices and memory. An input to the CPU which DMA controller uses for asking ownership of the bus is known as bus request. The response of bus is known as bus grant. Bus master initiates bus transfer. A classic four-cycle handshake is employed by DMA controller to gain control of the bus. The main three registers in DMA controller performs tasks like beginning of transfer ( starting address register), specifying the number of words to be transferred ( length register) and DMA controller link to CPU (status register).